# TerminatePorts¶

class picazzo3.container.terminate_ports.TerminatePorts(*args, **kwargs)

Wraps a PCell in a container and terminates the ports specified by the user. If None is given for the port_labels, all ports will be suppressed.

You can also provide another PCell to the property ‘termination’ which will be attached to each terminated port (a stub, to remove reflections). If None is provided, a logical termination is added to the Netlist, but no termiantion is added in the layout.

Parameters: termination: PCell, optional cell which will be used to terminate the ports termination_external_port_name_map: optional dict to map the names of the termination ports that are exposed as external ports. The format is { ‘port_name_on_termination’ : ‘new_name_{port}’ }. The ‘{port}’ in the map will be replaced by the corresponding port name on the component.For instance, when you use grating couplers or detectors as terminations, this map allows you to map the name of the vertical port or the electrical ports to the name of the terminated port on the contents. Similarly, you can use {inst} to insert the name of the instance of the termination. By default, the behavior is ‘{inst}_{port}’. termination_port_label: str, optional label of the port on the termination that will be used to connect to the part of the contents. Default is ‘in’ trace_template: optional Template for all ports. If None, the waveguide templates of the ports will be used termination_instance_prefix: str, optional Prefix for the instance names of the terminations. Default is taken from TECH.CONTAINER.TERMINATE_PORTS auto_transition: optional If True, automatically transition all ports of contents to the given trace template. If False, no transitions are applied, which might lead to a discontinuity in the waveguide. Also, if trace_template is None, no transitions are applied. port_labels: optional Labels of the ports to be processed. Set to None to process all ports. contents: PCell, optional the contents of the container: the child cell external_port_names: optional Dictionary for remapping of the port names of the contents to the external ports cell_instances: _PCellInstanceDict, optional name: optional The unique name of the pcell termination_external_port_name_maps: locked termination_port_labels: locked terminations: List with type restriction, allowed types: , locked trace_templates: List with type restriction, allowed types: , locked list of templates to apply to all ports

Examples

""" Simulation example of terminated ring resonator"""
from technologies import silicon_photonics
import ipkiss3.all as i3
import numpy as np
from picazzo3.filters.ring import RingRect180DropFilter

my_ring = RingRect180DropFilter()

cp = dict(cross_coupling1=1j*0.05**0.5,       # The coupling from bus to ring and back
straight_coupling1=0.95**0.5,       # Straight coupling
)

my_ring.CircuitModel(ring_length=2*np.pi*10.0,
coupler_parameters=[cp, cp]
)

from picazzo3.container.terminate_ports import TerminatePorts
from picazzo3.logical.termination import Termination

my_termination = Termination()
my_termination.CircuitModel(reflection=0.5**0.5)
my_ring_terminated = TerminatePorts(contents=my_ring, port_labels=["W1"], termination=my_termination)
my_ring_terminated_nl = my_ring_terminated.Netlist()
my_ring_terminated_cm = my_ring_terminated.CircuitModel()

wavelengths =  np.linspace(1.535, 1.55, 800)
R = my_ring_terminated_cm.get_smatrix(wavelengths=wavelengths)

import pylab as plt
plt.figure()
plt.plot(wavelengths, 10*np.log10(abs(R["in1","in1"]**2)), "r-", label="reflection in1")
plt.plot(wavelengths, 10*np.log10(abs(R["in1","out1",:]**2)), "b-", label="in port to pass port (out1)")
plt.plot(wavelengths, 10*np.log10(abs(R["in1","in2",:]**2)), "g-", label="in port to add port (in2)")
plt.xlim([wavelengths[0], wavelengths[-1]])
plt.legend()
plt.show()

""" Layout example of terminated ring resonator """
from technologies import silicon_photonics
import ipkiss3.all as i3
from picazzo3.filters.ring import RingRect180DropFilter
my_ring = RingRect180DropFilter()
my_ring.Layout()
from picazzo3.container.terminate_ports import TerminatePorts
# Optionaly we can add a structure where the ports are suppressed
from picazzo3.apertures.basic import WireWgAperture
from picazzo3.traces.wire_wg import WireWaveguideTemplate
wire_t = WireWaveguideTemplate()

Layout