ExtendPorts¶
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class
picazzo3.container.extend_ports.
ExtendPorts
(*args, **kwargs)¶ Extends all the ports listed in
port_labels
with a waveguide of a given length specified inextension_length
of the Layout View. A common trace template for all ports is specified throughtrace_template
.Parameters: trace_template: optional
Template for all ports. If None, the trace templates of the ports will be used
waveguides: List with type restriction, allowed types: <class ‘ipkiss3.pcell.cell.pcell.PCell’>, optional
waveguides added to the contents
auto_transition: optional
If True, automatically transition all ports of contents to the given trace template. If False, no transitions are applied, which might lead to a discontinuity in the waveguide. Also, if trace_template is None, no transitions are applied.
port_labels: optional
Labels of the ports to be processed. Set to None to process all ports.
contents: PCell, optional
the contents of the container: the child cell
external_port_names: optional
Dictionary for remapping of the port names of the contents to the external ports
cell_instances: _PCellInstanceDict, optional
name: optional
The unique name of the pcell
trace_templates: List with type restriction, allowed types: <class ‘ipkiss3.pcell.cell.pcell.PCell’>, locked
list of templates to apply to all ports
bundle: locked
bundle of waveguides added to the contents, generated based on the supplied waveguides list
Views
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Layout
¶ Parameters: extension_length: float and number > 0, optional
Length by which the ports are extended
view_name: str, optional
The name of the view
area_layer_on: optional
When True, the waveguide area will be covered by i3.Rectangles on all cover layers.
routes: optional
routes along which the waveguides will be generated
contents_transformation: GenericNoDistortTransform, optional
flatten_contents: optional
if True, it will insert the contents as elements in the layout, rather than as an Instance
extension_lengths: locked
grids_per_unit: locked
Number of grid cells per design unit
units_per_grid: locked
Ratio of grid cell and design unit
grid: float and number > 0, locked
design grid. Extracted by default from TECH.METRICS.GRID
unit: float and number > 0, locked
design unit. Extracted by default from TECH.METRICS.UNIT
Examples
from technologies import silicon_photonics from picazzo3.filters.ring import RingRect180DropFilter from picazzo3.traces.wire_wg import WireWaveguideTemplate from picazzo3.container.extend_ports import ExtendPorts from ipkiss3 import all as i3 wg_t1 = WireWaveguideTemplate() wg_t1.Layout(core_width=0.55) wg_t2 = WireWaveguideTemplate() wg_t2.Layout(core_width=0.35) my_ring = RingRect180DropFilter(name="ring_for_fanout", coupler_trace_templates=[wg_t1, wg_t2]) my_ring.Layout() port_labels = ['E1', 'E0'] my_container = ExtendPorts(contents=my_ring, port_labels=port_labels, auto_transition=True ) layout = my_container.Layout(extension_length=20.0, area_layer_on=False) layout.visualize()
from technologies import silicon_photonics from picazzo3.filters.ring import RingRect180DropFilter from picazzo3.traces.wire_wg import WireWaveguideTemplate from picazzo3.container.extend_ports import ExtendPorts from ipkiss3 import all as i3 wg_t1 = WireWaveguideTemplate() wg_t1.Layout(core_width=0.55) wg_t2 = WireWaveguideTemplate() wg_t2.Layout(core_width=0.35) my_ring = RingRect180DropFilter(name="ring_for_fanout", coupler_trace_templates=[wg_t1, wg_t2]) my_ring.Layout() port_labels = ['E1', 'E0'] my_container = ExtendPorts(contents=my_ring, port_labels=port_labels, trace_template=wg_t1, auto_transition=False #Default ) layout = my_container.Layout(extension_length=20.0, area_layer_on=True) layout.visualize()
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