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IPKISS 3.7

IPKISS

  • Installation
    • System Requirements
      • IPKISS Link for Siemens EDA
      • IPKISS Link for Ansys Lumerical
      • IPKISS Link for Dassault Systèmes Simulia
    • Installing IPKISS on Windows
      • Downloading the software
      • Installing the software
        • License types
        • Obtaining and installing a license
      • License Troubleshooting
      • Luceda Control Center
      • Installing a code editor
    • Installing IPKISS on Linux
      • Installing miniconda on Linux
      • Installing IPKISS packages
      • Installing the license on Linux
      • Configuring your IDE
    • Using a floating license
      • Hosting the license server
      • Configure your floating license
    • Installing a GDSII viewer
    • Where to go next
    • For IPKISS Link for Siemens EDA Users
      • Installing IPKISS Link for Siemens EDA
      • Verify your installation
    • Environment variables used by IPKISS
  • Tutorials
    • Introduction to Python
      • Python essentials
        • Variables
        • Lists and arrays
        • Loops
        • Functions
        • Loading modules
      • Object Oriented Programming in Python
        • What is object oriented programming
        • Object Oriented Programming in Python
        • Inheritance
        • Intermezzo: plotting in Python
        • Using your classes
      • Advanced class features
        • Private methods
        • Operator overloading
      • Finishing the sample program
        • Adding the Noisy Signal class
        • Implementing the filter class
        • Adjusting the main file
    • Setting up the environment
      • Downloading & installing Python editor
        • Launching PyCharm
      • IPKISS sample project
        • Setting up the interpreter
      • Creating a new IPKISS design project
        • Adding a PDK to your project
        • Additional user libraries
      • Some useful PyCharm features
        • Autocompletion
        • Jump-to-definition
        • Debugging
        • Configuring Python interpreter after project creation
      • Managing conda virtual environments and installing extra packages
        • Creating a development environment
        • Installing extra packages
      • Setting up the editor environment in Wing IDE
        • Creating a new project and choosing the python executable
        • The editor environment
        • Adding a folder to the project
        • Executing your first file
    • Quickstart: First simple circuit design
      • Step 1: Creating the components
        • The technology file
      • Step 2: Building circuits
        • Making the building blocks
        • Layout
        • CircuitModel
    • Design concepts
      • PCell and Views
      • Atomic Cell
      • Circuit (aka hierarchical cell)
        • Child and parent cells
        • Instances
        • Exposed ports
        • Placement & routings specifications
    • What is IPKISS?
      • Python Scripting
      • History
    • Ipkiss 3 overview
      • Ipkiss framework
        • Properties
        • PCell framework
        • Geometry
        • Layout
        • Netlist
        • Circuit simulation
        • Technology
        • Traces and waveguides
        • Virtual fabrication
        • Visualization
        • Device simulation
      • Picazzo component library
    • Layout: basics
      • Drawing waveguides
      • Creating a PCell
      • Building a small circuit
        • Ignore errors in specs
      • Parametrize cell and reuse
        • Parametrize spiral length
        • Parametrizing the trace template
        • Parametrizing the directional coupler
      • Verifying your layout
        • Netlist extraction
      • Post-layout simulation
      • Where to go from here
    • PCell: Basics
      • Step 1: PCell and Properties
        • The very beginning
        • Using properties to specify the design parameters
        • Executing a first script
        • Recap
      • Step 2: PCell and Views
        • Views
        • Instantiating views
        • Recap
      • Step 3: Technology
        • Using technology
        • Selecting a technology
        • Recap
      • Step 4: Simple layout: First GDSII
        • Adding elements to a layout
        • Visualizing and export to GDSII
        • Recap
    • Layout: Advanced (hierarchy and waveguides)
      • Step 1: Layout level hierarchy: Two Rings
        • Using ChildCellProperty to create Hierarchical PCells
        • Placing layout instances
        • Instantiating a hierarchical cell
        • Using defaults
        • Caution setting properties of child cells of TwoRingsWithDefaults
        • Recap
      • Step 2: Using waveguides in a layout
        • Waveguides
        • Default waveguide template and ChildCells
        • Placing the waveguides in the Layout View
        • Instantiating the ring
        • Modifying the width of the waveguide template
      • Step 3: Using ports and routes
        • Defining ports to connect components together
        • Using Routes
        • Defining the directional coupler using routes
        • Recap
      • Step 4: Using rounded waveguides
        • Defining rounded waveguides
        • Recap
    • Circuit models: Basics
      • First example of a model
      • Defining the CircuitModel view
      • Building a custom CompactModel
      • Building a circuit
      • Adding time-domain behavior
      • Writing multimode models
      • Specifying default values for parameters
      • Accessing the layout from the model view
      • Running simulations
        • Running a frequency-domain simulation
        • Running a time-domain simulation
      • Additional resources
    • Circuit models: Advanced
      • Model definition guidelines
      • Debugging Models
      • Python Models
      • Polynomial dependent variables and coefficients
      • Writing a netlist manually
      • Troubleshooting
    • Circuit models based on S-parameter data
      • Loading from touchstone into SMatrix1DSweep
        • Specific 3rd party tool support
      • Loading S-matrices from a binary file
      • Creating a B-Spline interpolation model
      • Assigning an smatrix model to your PCell
    • Physical device simulation
      • General concept
      • The basic steps
      • Define the Simulation Geometry
        • Create a layout
        • Verifying the device geometry
        • Simulation Geometry
        • Advanced geometry settings
      • Choose a simulation tool
    • Building an Aperture
      • Implementing StripAperture
      • RibAperture
      • Simulation
        • Defining SlabModes
        • Defining a custom SlabTemplate
        • Customizing Field Calculation
  • Sample gallery
    • Running a CAMFR simulation to compute the field profiles
      • Getting started
      • Defining the technology Materials and Virtual Fabrication
      • Mapping the material stacks
      • Defining the layout
      • Defining the CAMFR simulation
      • Running the CAMFR simulations
      • Visualizing the simulation data
    • Creating a Cell from an Existing GDSII file
      • Export a grating coupler to GDSII
      • Importing the GDSII file
    • Creating a Cell from an existing GDSII file with a new technology
      • Adding the missing layers to a tech file
      • Importing a cell with GDSII layers in the new tech file
    • A Ring Resonator based Filter based on the Vernier principle
      • Defining the Vernier Filter Circuit
        • Component synthesis by defining a design algorithm
      • Running the design, simulation and layout
    • Make a S-shaped AWG
      • Getting started
      • The aperture
      • The input star coupler
      • The output star coupler
      • The S shaped waveguide array
      • The Arrayed Waveguide Grating
      • Running the Caphe simulation
    • Loading a touchstone file
      • See also
    • Disk Resonator with Wraparound waveguide
      • Defining the Parametric Cell
      • Generating the Disk Layout using geometric primitives
      • Creating a Waveguide child cell
        • Creating a Rounded Waveguide
        • Calculating the correct control shape
        • Using Waveguide Templates
        • Adding Ports
        • Recap
    • Simulating an aperture with CAMFR
      • Getting started
      • The aperture
      • Get the field profile at the aperture
      • CircuitModel: Check the backreflection of the aperture
    • Layout and simulation of a ring resonator with grating couplers
      • Importing the technology file
      • Creating the ring resonator
      • Running a circuit simulation
      • Creating the grating coupler
      • Creating a small circuit with the ring and grating coupler
    • Spiral with Tapered Waveguides and Spline Bends
      • Defining the Spline Rounding Algorithm
      • Defining the trace template
      • Defining a spiral
    • Fixing sharp angles in the layout of a directional coupler
    • Defining a customized technology
      • Getting started
      • Adding a process layer
      • Defining rules
      • Visualization and import/export settings
      • Overwriting technology keys
      • Example: ring resonator with back-end opening cover layer
      • Defining the virtual fabrication
    • Make a Rectangular AWG
      • Getting started
      • The aperture
      • The input star coupler
      • The output star coupler
      • The rectangular waveguide array
      • The Arrayed Waveguide Grating
      • Running the Caphe simulation
    • Netlist extraction from layout
      • Importing the technology file
      • Creating a MZI in layout
      • Extracting the netlist
      • Run a simulation
    • Modifying the GDSII table of an existing technology
  • Guides
    • Technology
      • General structure of a TECH-tree
      • Required technology tree
      • Write your own TECH: Recommended file structure
      • Name of the technology
      • Metrics
      • Process
      • GDSII
      • Display Settings
      • Design Rules
      • Materials
      • Virtual Fabrication
        • Mask layers
        • From mask layers to material stacks
      • Traces
      • Grating Couplers
      • OpenAccess (IPKISS Link for Siemens EDA only)
        • Layer settings
        • Routing settings
      • Required Technology Keys: IPKISS
      • Required Technology Keys: PICAZZO
    • Properties
      • DefinitionProperty
        • Using DefinitionProperty
        • Default Values
        • Restrictions
        • Preprocessors
      • Caching
      • Derivates of DefinitionProperty
    • Parametric Cells
      • IPKISS PCells
        • Properties
      • Views
        • Define the state of a View
        • Only one view instance per view class.
        • Retrieving Views
        • View property defaults
      • Making Fixed (P)Cells
      • IPKISS Views
    • The Layout View
      • Layout concepts
      • Defining the layout view
      • Shapes
      • Elements
        • Boundary and Path elements
        • PolygonText
      • Groups
      • Using shape operations
      • Working with process purpose layers
      • Defining ports
      • Adding instances
      • Layout view inheritance
    • Hierarchical PCells
      • ChildCells
      • ChildCellProperty
      • Adding the child views
      • Overriding views originating from ChildCellProperty
      • Caution setting properties of child cell
    • Netlist
      • What is a Netlist view
      • Netlist terms
      • Netlist instances
      • Netlist Links
      • Naming of terms, links and instances
      • Generate a NetlistView from a LayoutView
        • Basic use
        • Generating terms only
        • Full hierarchical extraction
    • Waveguides
      • Waveguides are cells
      • Waveguides are Traces
      • Trace Templates
      • Predefined waveguide templates
      • How to use waveguides in a circuit (IPKISS)
      • How to use waveguides in a circuit (IPKISS Link for Siemens EDA module)
      • Basic waveguide example
      • See also
    • Caphe introduction
      • Circuit simulations
      • Building blocks for circuit simulations
      • Running circuit simulations in IPKISS
      • Advantages of using Caphe
      • Further reading
    • Boolean Operations
      • Booleans between Shapes
      • Booleans between Elements
        • Operations including Paths
      • Booleans between Layers
      • Booleans between ElementLists
      • A real-world example
  • IPKISS Reference
    • PCell Reference
      • PCell
      • Defining new Types with Properties
        • Adding Restrictions
        • Defining Default Values
        • Allowing None as a valid value
        • Caching
        • Locking Properties
        • Preprocessors
        • Documenting Properties
      • Properties & Restrictions Reference
        • Basic Properties
        • Properties Derived From DefinitionProperty
        • Restrictions
        • Property Preprocessors
        • Property Validation Errors
      • Library
    • Netlist Reference
      • Netlist view building blocks
        • ipkiss3.all.NetlistView
        • Terms
        • Instances
        • Nets
      • Netlist extraction
        • ipkiss3.all.NetlistFromLayout
        • extract_terms
    • Layout Reference
      • Geometry Reference
        • Basic Shapes
        • Spline Shapes
        • Shape modifiers
      • Ports Reference
        • Optical Ports
        • Electrical Ports
        • Create Ports
      • Placement and Routing Reference
        • Functions and classes
        • Specifications
      • Routing
        • Routing types
        • RouteToLine
        • RouteToAngle
        • Helper Functions
      • Transformations
        • ipkiss3.all.IdentityTransform
        • ipkiss3.all.Translation
        • ipkiss3.all.Rotation
        • ipkiss3.all.VMirror
        • ipkiss3.all.HMirror
        • ipkiss3.all.CMirror
        • ipkiss3.all.Stretch
        • ipkiss3.all.Magnification
      • Elements and Layers
        • Shape Elements
        • Reference Elements
      • SizeInfo
        • ipkiss3.all.SizeInfo
        • Retrieving the size info
        • Operations
      • Importing Layouts from GDSII
        • GDSCell
      • IoColumn
      • Layout View
      • Layout Operations
        • Boolean operations
        • Element operations
        • Layout operations
    • Connector Reference
      • Creating a connector
      • Connector algorithms
        • ipkiss3.all.Connector
        • ipkiss3.all.ConnectManhattan
        • ipkiss3.all.ConnectManhattanTapered
        • ipkiss3.all.ConnectBend
        • ipkiss3.all.ConnectLogical
    • Traces
      • Optical
        • WindowWaveguideTemplate
        • Waveguide
        • RoundedWaveguide
        • TaperedWaveguide
        • Using maximum bend radius
      • Bundles
      • Transitions
        • Waveguide transitions
        • Waveguide transitions starting from a port
        • AutoTraceTransitionFromPort
      • Electrical
        • ElectricalWire
        • ElectricalWindowWireTemplate
        • Electrical Vias
    • CircuitModel View reference
      • ipkiss3.all.CircuitModelView
      • ipkiss3.all.CompactModel
      • ipkiss3.all.HierarchicalModel
      • ipkiss3.all.Probe
      • ipkiss3.all.FunctionExcitation
      • ipkiss3.all.circuit_sim.SMatrix1DSweep
      • ipkiss3.all.circuit_sim.BSplineSModel
      • ipkiss3.all.circuit_sim.test_circuitmodel
    • Device simulation reference
      • IPKISS
        • camfr_guided_modes
        • camfr_mode_fields
        • camfr_compute_stack_neff
        • camfr_stack_expr_for_structure
        • get_material_stacks
        • ipkiss3.all.device_sim.SimulationGeometry
        • ipkiss3.all.device_sim.SMatrixOutput
        • ipkiss3.all.device_sim.MacroOutput
        • ipkiss3.all.device_sim.FileOutput
        • ipkiss3.all.device_sim.Port
        • ipkiss3.all.device_sim.Macro
        • ipkiss3.all.device_sim.MacroFile
      • Vendor specific references
    • Technology Reference
      • Technology
        • get_technology
        • ipkiss.technology.technology.TechnologyTree
        • ipkiss.technology.technology.DelayedInitTechnologyTree
      • Process
        • ipkiss3.all.ProcessLayer
        • ipkiss3.all.PatternPurpose
        • ipkiss3.all.ProcessPurposeLayer
        • ipkiss3.all.PPLayer
        • ipkiss3.all.Layer
      • GDSII
        • ipkiss3.all.AutoGdsiiLayerInputMap
        • ipkiss3.all.AutoGdsiiLayerOutputMap
        • ipkiss.process.layer_map.GenericGdsiiPPLayerInputMap
        • ipkiss.process.layer_map.GenericGdsiiPPLayerOutputMap
        • ipkiss.process.layer_map.UnconstrainedGdsiiPPLayerInputMap
        • ipkiss.process.layer_map.UnconstrainedGdsiiPPLayerOutputMap
      • Display
        • ipkiss.visualisation.display_style.DisplayStyle
        • ipkiss.visualisation.display_style.DisplayStyleSet
        • ipkiss.visualisation.display_style.CyclicDisplayStyleSet
      • Materials
        • pysics.basics.material.material.Material
        • pysics.basics.material.material.MaterialFactory
        • pysics.basics.material.material_stack.MaterialStack
        • pysics.basics.material.material_stack.MaterialStackFactory
      • Virtual Fabrication
        • ipkiss.plugins.vfabrication.process_flow.VFabricationProcessFlow
        • visualize_2d
        • cross_section
      • Example
    • File input/output
      • Touchstone import
        • import_touchstone_smatrix
    • PDK structure
      • PDK Source and distributable PDK
      • Requirements for IPKISS Link for Siemens EDA
        • PDK Source requirements
        • Distributable PDK requirements
        • Config File (pdkname.cfg)
        • Contents File (all.py)
        • Technology File (pdkname.technology)
    • Indices and tables
  • Picazzo Reference
    • Logical Blocks
      • Logical Couplers
        • Coupler2x1
        • Coupler1x2
        • Coupler2x2
      • Model Parameters
      • Logical Inline Reflectors
        • Reflector
        • WaveguideReflector
      • Model
      • Logical Termination
        • Termination
        • PerfectTermination
    • Fiber Couplers
      • Curved Fiber Couplers
        • FiberCouplerCurvedGrating
        • FiberCouplerCurvedGratingGeneric
      • Uniform Line Fiber Couplers
        • UniformLineGrating
      • Fiber Coupler base classes
        • FiberCouplerGrating
    • Filters
      • Mach-Zehnder Interferometers
        • MZI
        • MZIWaveguides
        • MZIWithCells
        • MZIWaveguideArm
        • MZIContainerArm
      • Ring Resonators
        • Hierarchy of the ring circuit and layout
        • Coupler sections
        • Coupler positioning
        • Circuit model
      • Multi Mode Interferometers
        • Tapered MMIs
        • Untapered MMIs
        • Rib MMIs
    • Photonic Crystals
      • Generic Photonic Crystals
        • DodecPhCLayout
        • HexPhCLayout
        • OctPhCLayout
        • SquarePhCLayout
        • TriangularPhCLayout
        • RectangularPhCLayout
      • Photonic Crystal W1 Waveguides and Cavities
        • GenericW1Waveguide
        • W1Waveguide
        • W1WaveguideWithInlineCavity
        • W1WaveguideWithAllpass
      • Photonic Crystal HeteroWaveguide Layouts
        • W1HeteroCavity
        • W1HeteroCavity1Mirror
        • W1HeteroCavityMulti
    • Traces
      • Wire Waveguides
        • WireWaveguideTemplate
        • Transitions
      • Rib Waveguides
        • RibWaveguideTemplate
        • RibWireWaveguideTemplate
        • Transitions
      • Thinned Waveguides
        • ThinnedWaveguideTemplate
        • Transitions
      • Slot Waveguides
        • SlotWaveguideTemplate
        • DoubleSlotWaveguideTemplate
        • Transitions
      • Socket Waveguides
        • SocketWaveguideTemplate
        • SlottedSocketWaveguideTemplate
        • Transitions
      • Electrical Wire
        • ElectricalWireTemplate
      • Transitions
        • Transition circuit models
    • Waveguide Blocks
      • Waveguide Bends
        • WgBend
        • WgBend90
      • Waveguide Splitters
        • WgYSplitter
        • WgYCombiner
        • WgY90Splitter
        • WgY90Combiner
        • WgY180Splitter
        • WgY180Combiner
      • Directional Couplers
        • StraightDirectionalCoupler
        • BendDirectionalCoupler
        • SBendDirectionalCoupler
        • CircuitModel details
      • Waveguide Crossings
        • WgDirectCrossing
        • WgParabolicCrossing
      • Waveguide Gratings
        • WaveguideNonUniformGrating
        • WaveguideUniformGrating
        • WaveguideSectionsGratingPeriod
        • ModifiedWaveguideGratingPeriod
        • WaveguideSideGratingPeriod
        • WaveguideSideRibGratingPeriod
        • WaveguideSideBlockGratingPeriod
        • WaveguideGrooveGratingPeriod
        • Model details
      • Waveguide Bundles
        • WaveguideBundle
        • TemplatedWaveguideBundle
      • Spirals
        • SingleSpiral
        • SingleSpiralRounded
        • DoubleSpiral
        • DoubleSpiralRounded
        • DoubleSpiralWithInCoupling
        • DoubleSpiralWithInCouplingRounded
        • FixedLengthSpiral
        • FixedLengthSpiralRounded
      • Waveguide Connectors
        • WaveguideConnector
        • RoundedWaveguideConnector
    • Routing
      • Placement and routing
        • ConnectComponents
        • PlaceAndConnect
    • Apertures
      • OpenAperture
      • WireWgAperture
    • Containers and Adapters
      • AutoTransitionPorts
        • AutoTransitionPorts
      • ExtendPorts
        • ExtendPorts
      • FanoutPorts
        • FanoutPorts
      • IoFibcoup
        • IoFibcoupGeneric
        • IoFibcoupEastWest
        • IoFibcoup
      • Containers with Waveguides
        • ContainerWithWaveguides
        • ContainerWithWaveguideBundle
        • ContainerWithRoundedWaveguides
        • ContainerWithRoundedWaveguideBundle
      • Route Ports
        • RoutePortsEastWest
        • RoutePortsAroundCorner
      • TerminatePorts
        • TerminatePorts
    • Electrical Components
      • Vias
        • ContactHole
        • Via12
    • Modulators
      • Phase modulators
        • Phase modulator trace templates
        • Phase modulator
    • single page reference
      • Logical Blocks
        • Coupler1x2
        • Coupler2x1
        • Coupler2x2
        • Reflector
        • WaveguideReflector
        • Termination
        • PerfectTermination
      • Grating Couplers
        • FiberCouplerCurvedGrating
        • FiberCouplerCurvedGratingGeneric
        • UniformLineGrating
        • FiberCouplerGrating
      • Ringresonators
        • RingRect
        • RingRect180DropFilter
        • RingRoundedShape
        • RingRectNotchFilter
        • RingRect180DropFilter
        • RingRect90DropFilter
        • RingRectWrappedNotchFilter
        • RingRectWrapped180DropFilter
        • RingRectSymmNotchFilter
        • RingRectSymm180DropFilter
        • RingRectSymm90DropFilter
        • RingRectSBendNotchFilter
        • RingRectSBend180DropFilter
      • Multi-mode Interferometers
        • MMITapered
        • MMIIdenticalTapered
        • MMISymmetricTapered
        • MMI1x2Tapered
        • MMI2x1Tapered
        • MMI2x2Tapered
        • RibMMIIdenticalTapered
        • RibMMISymmetricTapered
        • RibMMI1x2Tapered
        • RibMMI2x1Tapered
        • RibMMI2x2Tapered
        • MMI
        • MMIIdentical
        • MMISymmetric
        • MMI1x2
        • MMI2x1
        • MMI2x2
      • Mach-Zehnder Interferometers (MZI)
        • MZI
        • MZIWaveguides
        • MZIWithCells
        • MZIWaveguideArm
        • MZIContainerArm
      • Generic Photonic Crystals
        • DodecPhCLayout
        • HexPhCLayout
        • OctPhCLayout
        • SquarePhCLayout
        • TriangularPhCLayout
        • RectangularPhCLayout
      • Photonic Crystal HeteroWaveguide Layouts
        • W1HeteroCavity
        • W1HeteroCavity1Mirror
        • W1HeteroCavityMulti
      • Photonic Crystal W1 Waveguides and Cavities
        • GenericW1Waveguide
        • W1Waveguide
        • W1WaveguideWithInlineCavity
        • W1WaveguideWithAllpass
      • Rib Waveguides
        • RibWaveguideTemplate
        • RibWireWaveguideTemplate
      • Slot Waveguides
        • SlotWaveguideTemplate
        • DoubleSlotWaveguideTemplate
      • Socket Waveguides
        • SocketWaveguideTemplate
        • SlottedSocketWaveguideTemplate
      • Thinned Waveguides
        • ThinnedWaveguideTemplate
        • ThinnedWaveguideTemplate
      • Wire Waveguides
        • WireWaveguideTemplate
      • Rib Transitions
        • WireRibWaveguideTransitionLinear
        • WireRibWaveguideTransitionFromPortLinear
      • Slot Transitions
        • SlottedWireWaveguideTransitionLinear
        • SlottedWireWaveguideTransitionFromPortLinear
      • Socket Transitions
        • WireSocketWaveguideTransitionLinear
        • WireSocketWaveguideTransitionFromPortLinear
      • Thinned Transitions
        • ThinnedWireWireWaveguideTransitionLinear
        • ThinnedWireWireWaveguideTransitionFromPortLinear
      • Wire Transitions
        • WireWaveguideTransitionLinear
        • WireWaveguideTransitionFromPortLinear
      • Bends
        • WgBend
        • WgBend90
      • Crossings
        • WgDirectCrossing
        • WgParabolicCrossing
      • Gratings
        • WaveguideUniformGrating
        • WaveguideNonUniformGrating
        • ModifiedWaveguideGratingPeriod
        • WaveguideSideGratingPeriod
      • Directional Couplers
        • StraightDirectionalCoupler
        • BendDirectionalCoupler
        • SBendDirectionalCoupler
      • Splitters
        • WgYSplitter
        • WgYCombiner
        • WgY90Splitter
        • WgY90Combiner
        • WgY180Splitter
        • WgY180Combiner
      • Waveguide Bundles
        • WaveguideBundle
      • Spirals
        • SingleSpiral
        • SingleSpiralRounded
        • DoubleSpiral
        • DoubleSpiralRounded
        • DoubleSpiralWithInCoupling
        • DoubleSpiralWithInCouplingRounded
        • FixedLengthSpiral
        • FixedLengthSpiralRounded
        • ConnectComponents
        • PlaceAndConnect
        • OpenAperture
        • WireWgAperture
      • AutoTransitionPorts
        • AutoTransitionPorts
      • FanoutPorts
        • FanoutPorts
      • IoFibcoup
        • IoFibcoupGeneric
        • IoFibcoupEastWest
        • IoFibcoup
      • ContainerWithWaveguides
        • ContainerWithWaveguides
        • ContainerWithWaveguideBundle
        • ContainerWithRoundedWaveguides
        • ContainerWithRoundedWaveguideBundle
      • ExtendPorts
        • ExtendPorts
      • Route Ports
        • RoutePortsEastWest
        • RoutePortsAroundCorner
      • TerminatePorts
        • TerminatePorts
        • ContactHole
        • Via12
      • Phase Modulators
        • PhaseShifterWaveguideTemplate
        • LateralPNPhaseShifterTemplate
        • LongitudinalPNPhaseShifterTemplate
        • PhaseModulator

Modules

  • IPKISS AWG Designer
    • Getting Started
      • 1. PDK setup
      • 2. Reviewing the subcomponents
      • 2. Synthesize the AWG device
      • 3. Implement the AWG
      • 4. Preparing for tape-out
      • 5. Incorporating into a circuit
    • Guides
      • AWG Components
        • Overview
        • Slab Template
        • Apertures
        • Star Coupler
        • Waveguide Array
      • AWG Simulation
        • High-level AWG simulation strategy
        • Star coupler simulation
        • Waveguide array simulation
    • API reference
      • AWG Components
        • Slab templates
        • Apertures
        • Star couplers
        • Waveguide Array
        • Arrayed Waveguide Gratings
      • Functions
        • Design
        • Field profiles
        • Layouting
        • Analysis
        • Utilities
        • Legacy methods

Links

  • IPKISS Link for Siemens EDA
    • Working with IPKISS Link for Siemens EDA
      • Getting started with IPKISS Link for Siemens EDA
        • Installing a license file
        • Using the example library
        • Starting L-Edit
        • Loading the demonstration project
      • Creating a new design based on a PDK
        • Step 1: Start a new design
        • Step 2: Instantiate cells
        • Step 3: Route and generate waveguides
        • Step 4: Adapt waveguide routes
      • Reusing cells in circuits
        • Create the MZI design
        • Create the test design
        • Conclusion
    • Library organization
      • Step 1: The PDK
      • Step 2: User libraries
      • Step 3: Designs in IPKISS (code-based)
      • Step 4: Designs in IPKISS (OpenAccess based)
      • Step 5: Exporting user libraries to OpenAccess
    • Known limitations and issues
      • Limitations
      • Issues
    • Logging configuration
      • File logging
        • Loglevel
        • Logfolder location
  • IPKISS Link for Ansys Lumerical
    • Tutorial FDTD
      • 1. Define the geometry
      • 2. Define the simulation
      • 3. Inspect the simulation job
      • 4. Retrieve and plot simulation results
      • 5. Advanced simulation settings
        • Monitors
      • 6. Tool-specific settings
        • Using materials defined by the simulation tool
        • Macros
        • Export additional settings from Lumerical FDTD to IPKISS
    • Tutorial EME
      • 1. Define the geometry
      • 2. Define the simulation
      • 3. Inspect the simulation job
      • 4. Retrieve and plot simulation results
      • 5. Advanced simulation settings
        • Monitors
      • 6. Tool-specific settings
        • Using materials defined by the simulation tool
        • Macros
        • Export additional settings from Lumerical EME to IPKISS
    • API Reference
      • ipkiss3.all.device_sim.SimulationGeometry
      • ipkiss3.all.device_sim.SMatrixOutput
      • ipkiss3.all.device_sim.MacroOutput
      • ipkiss3.all.device_sim.FileOutput
      • ipkiss3.all.device_sim.Port
      • ipkiss3.all.device_sim.Macro
      • ipkiss3.all.device_sim.MacroFile
      • ipkiss3.all.device_sim.LumericalFDTDSimulation
      • ipkiss3.all.device_sim.LumericalEMESimulation
      • Macros
        • fdtd_profile_xy
        • fdtd_mesh_accuracy
        • export_port_neff
        • eme_setup
        • eme_profile_xy
        • eme_transverse_mesh
        • eme_wavelength
  • IPKISS Link for Dassault Systèmes SIMULIA
    • Tutorial
      • 1. Define the geometry
      • 2. Specify the simulation job
      • 3. Inspect the simulation job
      • 4. Retrieve and plot simulation results
      • 5. Advanced simulation settings
        • Monitors
      • 6. Use tool-specific settings
        • Using materials defined by the simulation tool
        • Macros
        • Export additional settings from CST Studio Suite to IPKISS
        • Multiphysics simulations
    • API Reference
      • ipkiss3.all.device_sim.SimulationGeometry
      • ipkiss3.all.device_sim.SMatrixOutput
      • ipkiss3.all.device_sim.MacroOutput
      • ipkiss3.all.device_sim.FileOutput
      • ipkiss3.all.device_sim.Port
      • ipkiss3.all.device_sim.Macro
      • ipkiss3.all.device_sim.MacroFile
      • ipkiss3.all.device_sim.CSTTDSimulation
      • Macros
        • field_monitor

Support and Changelog

  • Release notes
    • Release notes IPKISS Photonics Design Platform 3.7.0
      • Place and route of photonic ICs using i3.Circuit
      • Placing and routing
      • Connectors
        • Manhattan control points
      • Custom solver macros
    • Release notes IPKISS Photonics Design Platform 3.6.0
      • Device simulation (IPKISS Link for Ansys Lumerical)
      • Layout improvements
      • AWG Designer
      • Caphe
      • IPKISS Link for Siemens EDA
    • Release notes IPKISS Photonics Design Platform 3.5.0
      • IPKISS AWG Designer
        • Note on backward compatibility
      • Layout improvements
      • CAMFR improvements
    • Release notes IPKISS 3.4.0
      • Product structure
      • IPKISS.eda module
      • IPKISS
      • Documentation
    • Release notes IPKISS 3.3.0
      • Spec-based device placement
      • Netlist extraction
      • Documentation improvements
    • Release notes IPKISS 3.2.0
      • Physical device simulation links
      • Model building
      • Documentation improvements & new tutorials
    • Release notes IPKISS 3.1.3
      • New compact model framework
        • Redesigned model syntax
        • Adding circuit models to libraries and PDKs
        • Time-domain API
        • Overall improvements on the simulation side
      • Bundled editor
      • Custom routing in IPKISS.eda
    • Release notes IPKISS 3.1.2
      • Improvements to internal caching
      • Virtual fabrication
      • Using matplotlib notebook
    • Release notes IPKISS 3.1.1
      • License installation and verification
      • Updated packages
      • Visualization: ports can be labeled
      • Cross-sections of trace templates
      • PlaceAndConnect draws flylines when links are not properly connected
      • Shapes for performing spline fitting
        • ShapeFitNaturalCubicSpline
        • ShapeFitClampedCubicSpline
    • Release notes IPKISS 3.1.0
  • Changelog
    • IPKISS Photonics Design Platform
      • IPKISS Photonics Design Platform 3.7
        • IPKISS
        • IPCORE
        • IPKISS AWG Designer
        • IPKISS Link for Ansys Lumerical
        • IPKISS Link for Dassault Systèmes Simulia
        • Documentation
        • Luceda Academy
      • IPKISS Photonics Design Platform 3.6
        • IPKISS
        • IPKISS Link for Ansys Lumerical
        • IPKISS Link for Dassault Systèmes Simulia
        • IPKISS Link for Siemens EDA
        • IPKISS AWG Designer
      • IPKISS Photonics Design Platform 3.5
        • Ipkiss
        • Picazzo
        • Documentation
        • IPKISS AWG Designer
    • Previous IPKISS versions
      • Ipkiss 3.4.1
        • Ipkiss
        • Ipkiss.eda
        • Documentation
      • Ipkiss 3.4
        • Installation
        • Ipkiss
        • Ipkiss.eda
        • Documentation
        • Backward compatibility notes
      • Ipkiss 3.3
        • Documentation
        • Ipkiss
        • Picazzo
        • Ipkiss.eda
      • Ipkiss 3.2.1
        • General
        • Ipkiss
        • Documentation
      • Ipkiss 3.2
        • General
        • Ipkiss
        • Ipcore
        • Caphe
        • Luceda control center
        • Ipkiss.eda
        • Documentation
      • Ipkiss 3.1.3
        • General
        • Ipcore
        • Ipkiss
        • Caphe
        • Picazzo
        • Ipkiss.eda
      • Ipkiss 3.1.2
        • Installation & Getting Started
        • Ipcore
        • Ipkiss
        • Pysics
        • Picazzo
        • Ipkiss.eda
        • Ipkiss 2.4 Compatibility
        • Documentation
      • Ipkiss 3.1.1
        • Ipkiss
        • Ipkiss-caphe interface
        • Picazzo
        • Samples & documentation
      • Ipkiss 3.1.0
        • Installation
        • Samples & documentation
        • Ipcore
        • Ipkiss
        • Picazzo
        • Picazzo 2.4
        • Ipkiss 2.4
        • Pysimul
      • Ipkiss 3.0.1
        • Ipcore
        • Ipkiss
        • Picazzo
        • Simulation
        • i-Python notebooks
        • Ipkiss 2.4 compatibility
      • Ipkiss 3.0
        • Functionality
        • User experience
        • Under the hood
      • Ipkiss 2.4.6
        • Ipkiss
        • Picazzo
        • Pysimul
      • Ipkiss 2.4.5
        • Ipkiss
        • Pysimul
        • Documentation
        • Picazzo
        • Spectral_toolbox
      • Ipkiss 2.4.4
        • Ipkiss
        • Ipcore
        • Picazzo
  • Backwards compatibility
    • Known backwards incompatibilities in 3.7.0
      • Bend size calculation changes
      • RoundedWaveguide: bend radius verification
      • Straight section lengths in TaperedWaveguide
      • Order of placed instances
      • AWGDesigner: Straight section lengths in RectangularExpandedAWG
      • Removal internal_member_name
    • Porting from Ipkiss 3.6 to Ipkiss 3.7
      • Porting CircuitCell (Luceda Academy) to IPKISS 3.7
        • Porting simple cells
        • Porting parametric cells (inheritance)
      • Porting PlaceComponents/PlaceAndAutoRoute
      • Porting i3.place_insts
    • Known backwards incompatibilities in 3.6.0
    • Known changes in 3.6.0
      • Stubbing of acute angles
      • Tapered waveguide
      • AWG fanout in waveguide arrays
    • Known backwards incompatibilities in 3.5.0
      • Shape Cutting Algorithm
      • CAMFR Engine
    • Porting from Ipkiss 3.4 to Ipkiss 3.5
      • Replacing ExpandedWaveguide by TaperedWaveguide
      • IPKISS AWG Designer
        • Import statement
        • Apertures
        • Star Couplers
        • Arrayed Waveguide Gratings
        • CAMFR engine
        • PDKs
        • Other
    • Known backwards incompatibilities in 3.4.0
      • TraceBundle
      • IPKISS.eda
      • IPKISS.eda logging
      • Timestamps: created, modified
      • Unit and Grid Properties
      • Locked properties
    • Porting from Ipkiss 3.3 to Ipkiss 3.4
      • Rebuilding your libraries
      • PDK Config File
      • Routing functions
    • Known backwards incompatibilities in 3.3.0
      • NetlistFromLayout
      • Spirals
      • Autotransition database
    • Layout changes 3.2.0
      • ShapeArc
      • route_to_parallel_line
    • Known backwards incompatibilities 3.1.3
      • Waveguide circuit models
      • Subclassing legacy CapheModel
      • ShapeWindowTraceTransition.straight_extension
    • Porting circuit models and user code from Ipkiss 3.1.2 to Ipkiss 3.1.3
      • 1. Convert PCell definition
      • 2. Convert user code
    • Known backwards incompatibilities 3.1.2
    • Porting from Ipkiss 3.0.1 to Ipkiss 3.1
      • Luceda debug environment variables have changed
      • PICAZZO: The Transition between WireWaveguides has an adaptive length
      • PICAZZO: The default purpose of ElectricalWireTemplate has changed
    • Porting from Ipkiss 3.0 to Ipkiss 3.0.1
      • The set method is more restrictive
      • Casting of Numbers in NumberProperties
      • PortList behaves similar to TermDict
      • Layer Properties in PICAZZO
      • Technology
      • Explicit Evaluations of child views are no longer required
      • Notebooks are now using IPython 3
    • Running Ipkiss 2.4 code in Ipkiss 3
      • Property system
        • Using properties on objects that don’t inherit from StrongPropertyInitializer
        • Overriding Properties with normal python attributes
        • Implementing Restrictions
        • Creating classes with definition names that are not declared at first
        • Number properties are cast to the correct type
      • Leading and trailing underscores
      • Layout
        • Magnification
      • Technology files
      • Mixing 3.0 and 2.4 syntax
    • Porting from Ipkiss 2.4 to Ipkiss 3
      • Importing Ipkiss
      • Property defaults: define_ → _default_
      • Structure (2.4) → PCell/LayoutView (3.0)
      • Port names
      • Using the Layout view
      • Netlist View
      • Hierarchy
        • Default children
        • Passing parameters from parent to default child
      • Waveguide Definition (2.4) → Waveguide Template (3.0)
        • Custom window waveguide definitions (2.4) -> window trace templates (3.0)
        • WgElDefinition
      • Waveguides: cells instead of layout elements
      • Picazzo
      • Technology
  • Summary per version
  • Glossary
    • Design Automation
      • General
      • Semiconductor ecosystem
      • Layout and mask
      • Modeling
      • Formats
      • Verification
    • Photonics
    • IPKISS
    • Python Programming
  • Support
    • Who is entitled to support
    • Software
    • Purchasing
    • Licensing
    • Foundry Process Design Kits
    • Training
    • Troubleshooting
  • 🌐 lucedaphotonics.com
  • 🎓 academy.lucedaphotonics.com
IPKISS
  • »
  • IPKISS Link for Dassault Systèmes SIMULIA

IPKISS Link for Dassault Systèmes SIMULIA¶

Simulate your IPKISS design with Dassault Systèmes SIMULIA using our link.

  • Tutorial
    • 1. Define the geometry
    • 2. Specify the simulation job
    • 3. Inspect the simulation job
    • 4. Retrieve and plot simulation results
    • 5. Advanced simulation settings
      • Monitors
    • 6. Use tool-specific settings
      • Using materials defined by the simulation tool
      • Macros
      • Export additional settings from CST Studio Suite to IPKISS
      • Multiphysics simulations
  • API Reference
    • ipkiss3.all.device_sim.SimulationGeometry
    • ipkiss3.all.device_sim.SMatrixOutput
    • ipkiss3.all.device_sim.MacroOutput
    • ipkiss3.all.device_sim.FileOutput
    • ipkiss3.all.device_sim.Port
    • ipkiss3.all.device_sim.Macro
    • ipkiss3.all.device_sim.MacroFile
    • ipkiss3.all.device_sim.CSTTDSimulation
    • Macros
      • field_monitor
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